X-SRAM: Enabling In-Memory Boolean Computations in CMOS Static Random Access Memories

摘要

Silicon-based Static Random Access Memories (SRAM) and digital Boolean logichave been the workhorse of the state-of-art computing platforms. Despitetremendous strides in scaling the ubiquitous metal-oxide-semiconductortransistor, the underlying \textit{von-Neumann} computing architecture hasremained unchanged. The limited throughput and energy-efficiency of thestate-of-art computing systems, to a large extent, results from the well-known\textit{von-Neumann bottleneck}. The energy and throughput inefficiency of thevon-Neumann machines have been accentuated in recent times due to the presentemphasis on data-intensive applications like artificial intelligence, machinelearning \textit{etc}. A possible approach towards mitigating the overheadassociated with the von-Neumann bottleneck is to enable \textit{in-memory}Boolean computations. In this manuscript, we present an augmented version ofthe conventional SRAM bit-cells, called \textit{the X-SRAM}, with the abilityto perform in-memory, vector Boolean computations, in addition to the usualmemory storage operations. We propose at least six different schemes forenabling in-memory vector computations including NAND, NOR, IMP (implication),XOR logic gates with respect to different bit-cell topologies $-$ the 8T celland the 8$^+$T Differential cell. In addition, we also present a novel\textit{`read-compute-store'} scheme, wherein the computed Boolean function canbe directly stored in the memory without the need of latching the data andcarrying out a subsequent write operation. The feasibility of the proposedschemes has been verified using predictive transistor models and Monte-Carlovariation analysis.